## Decision

Hardware is at **spec/design stage only**, and `cad/DESIGN.md` is **still a draft**. The owner has confirmed the draft should keep the **RJ45/8P8C, 8-port, 12 V, I2C-mux** direction and refine it, rather than explore a different connector. The **compute and power input are still undecided**. No prototype build or manufacturing readiness is planned.

## Source

`TODO`:

- "Brick (connector format and power sorted, schematic)"
- "LED", "Ultrasonic", "Motor", "Generic pin in/out module for electronics lessons"
- "Circuit to discover connected hardware"
- "Building a spec for the component interlink and publishing it."

## Current state

- `cad/DESIGN.md` proposes an Interlink with shielded RJ45/8P8C ports, 12 V input, a per-port I2C mux, an ID EEPROM at `0x50`, and a discovery sequence.
- `cad/brick.scad` and the module/connector/rail SCAD files exist.
- `hardware/manifest.json` already defines prototype LED, ultrasonic/distance and motor parts; all are marked `"validation": "prototype"`.
- There is no generic pin in/out module in the manifest.

This is the concrete design checklist for the umbrella issue #10.

## Acceptance — Brick draft

- [ ] Review `cad/DESIGN.md` and list every unresolved electrical and mechanical decision.
- [ ] Refine the approved direction (RJ45/8P8C, 8 ports, 12 V, I2C mux, ID EEPROM) and list the remaining open choices: compute, power input, protection and exact pinout.
- [ ] Draft the connector pinout and power budget so a schematic could be drawn later.
- [ ] Draft the discovery sequence and descriptor format, including hot-plug and bad-descriptor behaviour.
- [ ] Record the open questions and risks; get owner sign-off before any PCB layout.

## Acceptance — module specs

- [ ] Draft the LED, ultrasonic and motor module specs: channels, power class, descriptor and CAD.
- [ ] Define the generic pin in/out module: GPIO breakout, buttons, analog input, servo, or a combination.
- [ ] Give every module a bill of materials and assembly concept.
- [ ] Keep the manifest definitions consistent with the draft; do not mark a part validated without a build.
- [ ] Publish the interlink specification and module list when the draft is accepted (see #93).

No PCB layout, bench validation or prototype build is required by this issue.


<sub>Generated on _MrBeast_ using _opencode/deepseek-v4.1-flash_ in _ses_e8326e581ffeJviTmSkomwnKES_</sub>